december 2000 1/12 ? VNQ660SP quad channel high side solid state relay n output current per channel: 6a n cmos compatible inputs n open load detection (off state) n undervoltage & overvoltage n shut- down n overvoltage clamp n thermal shut-down n current limitation n very low stand-by power dissipation n protection against: n loss of ground & loss of v cc n reverse battery protection (**) description the VNQ660SP is a monolithic device made by using | stmicroelectronics vipower m0-3 technology, intended for driving resistive or inductive loads with one side connected to ground. this device has four independent channels. built- in thermal shut down and output current limitation protect the chip from over temperature and short circuit. type r ds(on) i out v cc VNQ660SP 50m w (*) 6a 36 v 1 preliminary data absolute maximum rating (**) see application schematic at page 8 symbol parameter value unit v cc supply voltage (continuous) 41 v -v cc reverse supply voltage (continuous) -0.3 v i out output current (continuous), per each channel internally limited a i r reverse output current (continuous), per each channel -15 a i in input current +/- 10 ma i stat status current +/- 10 ma i gnd ground current at t c <25 c (continuous) -200 ma v esd electrostatic discharge (r=1.5k w ; c=100pf) 2000 v p tot power dissipation at t c =25 c89w t j junction operating temperature -40 to 150 c t stg storage temperature -65 to 150 c e c non repetitive clamping energy at t c =25 deg. 150 mj powerso-10 ? 1 10 (*) per each channel
2/12 VNQ660SP 1 block diagram undervoltage overvoltage overtemp. 1 overtemp. 2 i lim2 demag 2 i lim1 demag 1 input 1 input 2 gnd v cc output 1 output 2 driver 2 driver 1 logic overtemp. 3 overtemp. 4 i lim4 demag 4 i lim3 demag 3 input 3 input 4 output 3 output 4 driver 4 driver 3 status status open load off-state current and voltage conventions i cc i gnd v cc gnd input 4 input 3 i out2 i in3 i in4 v in4 v in3 v cc v out2 i out1 v out1 input 1 i in1 input 2 i in2 v in1 v in2 i stat status v stat output 4 output 3 i out3 i out4 v out4 v out3 output 1 output 2
3/12 VNQ660SP 1 connection diagram (top view) 1 2 3 4 5 6 7 8 9 10 11 gnd output 4 output 3 output 2 output 1 status input 4 input 3 input 2 input 1 v cc thermal data switching (v cc =13v) (**) per device. symbol parameter value unit r thj-case thermal resistance junction-case (max) per channel 2.0 c/w r thj-case thermal resistance junction-case (max) (all channels on) 1.4 c/w r tj-amb thermal resistance junction-ambient (max) 52 (*) c/w symbol parameter test conditions min typ max unit v cc (**) operating supply voltage 5.5 13 36 v v usd (**) undervoltage shutdown 3.5 4.6 5.5 v v uvhyst (**) undervoltage hysteresis 0.2 1 v v ov (**) overvoltage shutdown 36 42 48 v v ovhyst (**) overvoltage hysteresis 0.25 v i s (**) supply current off state; input=0v; v cc =13.5v off state; input=0v; v cc =13.5v t j =25 c on state input=3.25v; 9v 4/12 VNQ660SP protections (per each channel) logic input (per each channel) openload detection (off state) per each channel (*) see figure 1 symbol parameter test conditions min typ max unit t tsd shutdown temperature 150 170 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 25 c i lim dc short circuit current 9v 5/12 VNQ660SP electrical transient requirements switching characteristics iso t/r 7637/1 test pulse test levels i ii iii iv delays and impedance 1 -25 v -50 v -75 v -100 v 2 ms 10 w 2 +25 v +50 v +75 v +100 v 0.2 ms 10 w 3a -25 v -50 v -100 v -150 v 0.1 m s50 w 3b +25 v +50 v +75 v +100 v 0.1 m s50 w 4 -4 v -5 v -6 v -7 v 100 ms, 0.01 w iso t/r 7637/1 test pulse test levels result i ii iii iv 1 cc cc 2 cc cc 3a cc cc 3b cc cc 4 cc cc 5 ce ee class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. 1 t t v load v in 80% 10% dv out /dt (on) t d(off) 90% dv out /dt (off) t d(on) t r
6/12 VNQ660SP 2 1 truth table (per each channel) figure 1: status timing waveforms conditions input output status normal operation l h l h h h overtemperature l h l l h l undervoltage l h l l x x overvoltage l h l l h h current limitation l h l x h h output voltage > v ol l h h h l h 1 v in v stat t dol openload status timing v in v stat overtemp status timing t sdl t sdl t sdl
7/12 VNQ660SP 1 status input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc v cc >v ov status n input n status n undefined overtemperature input n status n t tsd t r figure1: waveforms t j load voltage n v cc 8/12 VNQ660SP 1 gnd protection network against reverse battery solution 1: resistor in the ground line (r gnd only). this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1) r gnd 600mv / (i s(on)max ). 2) r gnd (- v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsd. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not common with the device ground then the r gnd will produce a shift (i s(on)max *r gnd ) in the input thresholds and the status output values. this shift will vary depending on how many devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the st suggests to utilize solution 2 (see below). solution 2: a diode (d gnd ) in the ground line. a resistor (r gnd =1k w) should be inserted in parallel to d gnd if the device will be driving an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of the ground network will produce a shift ( j 600mv) in the input threshold and the status output values if the microprocessor ground is not common with the device 1 application schematic v cc1,2 d ld +5v r prot status input1 +5v output3 output1 output2 output4 input3 input4 r prot r prot r prot r prot input2 m c gnd d gnd r gnd v gnd note: channels 3 & 4 have the same internal circuit as channel 1 & 2.
9/12 VNQ660SP 1 ground. this shift will not vary if more than one hsd shares the same diode/resistor network. load dump protection d ld is necessary (transil or mov) if the load dump peak voltage exceeds v cc max dc rating. the same applies if the device will be subject to transients on the v cc line that are greater than the ones shown in the iso t/r 7637/1 table. m c i/os protection: if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the m c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of m c and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of m c i/os. -v ccpeak /i latchup r prot (v oh m c -v ih -v gnd )/i ihmax calculation example: for v ccpeak = - 100v and i latchup 20ma; v oh m c 4.5v 5k w r prot 65k w . recommended r prot value is 10k w.
10/12 VNQ660SP 1 1 1 1 dim. mm. inch min. typ max. min. typ. max. a 3.35 3.65 0.132 0.144 a (*) 3.4 3.6 0.134 0.142 a1 0.00 0.10 0.000 0.004 b 0.40 0.60 0.016 0.024 b (*) 0.37 0.53 0.014 0.021 c 0.35 0.55 0.013 0.022 c (*) 0.23 0.32 0.009 0.0126 d 9.40 9.60 0.370 0.378 d1 7.40 7.60 0.291 0.300 e 9.30 9.50 0.366 0.374 e2 7.20 7.60 0.283 300 e2 (*) 7.30 7.50 0.287 0.295 e4 5.90 6.10 0.232 0.240 e4 (*) 5.90 6.30 0.232 0.248 e 1.27 0.050 f 1.25 1.35 0.049 0.053 f (*) 1.20 1.40 0.047 0.055 h 13.80 14.40 0.543 0.567 h (*) 13.85 14.35 0.545 0.565 h 0.50 0.002 l 1.20 1.80 0.047 0.070 l (*) 0.80 1.10 0.031 0.043 a 0? 8? 0? 8? a (*) 2? 8? 2? 8? 1 1 powerso-10 ? mechanical data (*) muar only poa p013p detail oao plane seating a l a1 f a1 h a d d1 == == e4 0.10 a e c a b b detail oao seating plane e2 10 1 eb he 0.25 p095a
11/12 VNQ660SP 1 powerso-10 ? suggested pad layout 1 tape and reel shipment (suffix a13tro) reel dimensions all dimensions are in mm. base q.ty 600 bulk q.ty 600 a (max) 330 b (min) 1.5 c( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 24 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed 6.30 10.8- 11 14.6-14.9 9.5 1 2 3 4 5 1.27 0.67-0.73 0.54- 0.6 10 9 8 7 6 b a c all dimensions are in mm. base q.ty bulk q.ty tube length ( 0.5) a b c ( 0.1) casablanca 50 1000 532 10.4 16.4 0.8 muar 50 1000 532 4.9 17.2 0.8 tube shipment (no suffix) c a b muar casablanca
12/12 VNQ660SP 1 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a trademark of stmicroelectronics ? 2000 stmicroelectronics - printed in italy- all rights reserved. stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
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